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Design a CPU 2

SynopsisDesign a CPU 2, available at $79.99, has an average rating of...
Design a CPU 2  No.1

Design a CPU 2, available at $79.99, has an average rating of 4.9, with 74 lectures, based on 23 reviews, and has 796 subscribers.

You will learn about Mico-Coded Control Unit Design Addressing Modes Assembler in Python CPU Mertrics Labels and Declarations Port Mapped Input Output Memory Mapped Input Output The Stack Subroutines High Level Language Constructs in Assembly Language 16 Bit Machine with 90 Instructions This course is ideal for individuals who are This course is aimed at people who want to learn Computer Architecture Organisation and Design by building their very own Computer as opposed to learning from imaginary machines. It is particularly useful for This course is aimed at people who want to learn Computer Architecture Organisation and Design by building their very own Computer as opposed to learning from imaginary machines.

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Summary

Title: Design a CPU 2

Price: $79.99

Average Rating: 4.9

Number of Lectures: 74

Number of Published Lectures: 74

Number of Curriculum Items: 74

Number of Published Curriculum Objects: 74

Original Price: $19.99

Quality Status: approved

Status: Live

What You Will Learn

  • Mico-Coded Control Unit Design
  • Addressing Modes
  • Assembler in Python
  • CPU Mertrics
  • Labels and Declarations
  • Port Mapped Input Output
  • Memory Mapped Input Output
  • The Stack
  • Subroutines
  • High Level Language Constructs in Assembly Language
  • 16 Bit Machine with 90 Instructions
  • Who Should Attend

  • This course is aimed at people who want to learn Computer Architecture Organisation and Design by building their very own Computer as opposed to learning from imaginary machines.
  • Target Audiences

  • This course is aimed at people who want to learn Computer Architecture Organisation and Design by building their very own Computer as opposed to learning from imaginary machines.
  • In this course we take what we learned from the first course and expand on the simple 8 bit design and create a 16 bit machine with a maximum of 64 instructions with each instruction having access to 4 different addressing modes. We cover port mapped i/o and memory mapped i/o. We start using a new faster more stable version of Logisim.
    The hard wired control unit is replaced with a mixed hardwired and microcoded control unit. We increase the number of general purpose registers from 4 to 6 and add in a temporary register, index register , stack pointer register and floating point unit register.

    We design a new assembler in python to help us write the assembly language code with our new larger instruction set.

    Finally we add on a keyboard a character display and a graphics display.

    The 64 Kbyte address space is split into a ROM that contains the start of an operating system and commonly used subroutines and a RAM that contains the program code and data.
    If you want to know how to build a fully functioning 16 bit machine and design some cool assembly language programs then this is the course you need to take.

    Don’t just read about theory and imaginary machines , build an actual machine that works. It’s the best way of learning Computer Architecture Design and Organisation.

    Course Curriculum

    Chapter 1: Introduction

    Lecture 1: Introduction

    Lecture 2: The CPU

    Lecture 3: Assembler / Debugger

    Lecture 4: Load and Run

    Chapter 2: Add Subtract Multiply Divide

    Lecture 1: Count to Three

    Lecture 2: Add Subtract

    Lecture 3: Multiply Divide

    Lecture 4: CPU and Algorithm Metrics

    Chapter 3: Assembler and Compiler

    Lecture 1: Assembler Labels and Declarations

    Lecture 2: Compile and Assemble

    Chapter 4: Update Design

    Lecture 1: Roadmap for Next 10 Videos

    Lecture 2: New Reset Method

    Chapter 5: Port Mapped I/O

    Lecture 1: Input Output Instruction

    Lecture 2: Input Device

    Lecture 3: Output Device

    Lecture 4: New Completed Input Output

    Chapter 6: Port to Logisim Evolution

    Lecture 1: Port to Logisim Evolution

    Chapter 7: 16 Bit Machine

    Lecture 1: 16 Bit Machine

    Chapter 8: Memory Mapped I/O

    Lecture 1: Memory Mapped IO Theory

    Lecture 2: Memory Mapped IO Circuits

    Chapter 9: Micro-Coded Control Unit

    Lecture 1: Hardwired v Micro-Coded Control Unit

    Lecture 2: Transition to Micro-Coded Control Unit

    Lecture 3: Micro-Coded Control Unit Explained

    Lecture 4: Mixed Micro-Coded and Hard Wired Control Unit

    Lecture 5: Mapping Instructions to ROM

    Lecture 6: Compression ROM

    Chapter 10: The Stack

    Lecture 1: New Design Overview

    Lecture 2: Stack 1 Theory

    Lecture 3: Stack 2 Implemetation

    Lecture 4: Stack 3 Instructions

    Chapter 11: Architecture and Addressing Modes

    Lecture 1: Addressing Modes Introduction

    Lecture 2: Architecture 1

    Lecture 3: Architecture 2

    Lecture 4: Full Instruction Set

    Lecture 5: Implementing Addressing Mode in MicroCode

    Lecture 6: Architecture 3

    Lecture 7: Architecture 4

    Chapter 12: Keyboard Screen and Graphics Display

    Lecture 1: Keyboard

    Lecture 2: Keyboared Example

    Lecture 3: Display

    Lecture 4: Display Example

    Lecture 5: New Clock Circuit

    Lecture 6: Graphics Card 1

    Lecture 7: PIXEL Instruction

    Lecture 8: PIXEL Example

    Lecture 9: Graphics Card 2

    Lecture 10: SPLASH Instruction

    Lecture 11: Creating a Splash Screen Image

    Chapter 13: Assembler

    Lecture 1: Install Python

    Lecture 2: First Assembly Language Program

    Lecture 3: Loops and Labels

    Lecture 4: EQU and DS Assembler Directives

    Lecture 5: Factorial Example

    Lecture 6: Greatest Common Divisor

    Lecture 7: DS , DC , EQU Assembler Directives Compared

    Chapter 14: Subroutines , Functions and Basic Control Structures

    Lecture 1: Read and Write Characters

    Lecture 2: (get_char) and (print_char) Subroutines

    Lecture 3: Passing Parameters by Value

    Lecture 4: Passing Parameters by Reference

    Lecture 5: Passing Parameters Using the Stack

    Lecture 6: Basic High Level Constructs

    Lecture 7: Recursion

    Lecture 8: Generating a One Dimensional Array using EQU Directive

    Lecture 9: Manipulating a One Dimensional Array using the EQU Directive

    Lecture 10: Generating a One Dimensional Array using the DS Directive

    Lecture 11: Printing Characters from an Array to the Screen using the DC Directive

    Chapter 15: Mathematics Library

    Lecture 1: The Absolute Value

    Chapter 16: Graphics Library

    Lecture 1: Bresenhams Algorithm

    Lecture 2: Bresenhams Algorithm Example

    Lecture 3: Bresenhams Line Drawing Algorithm in Python

    Lecture 4: Bresehams Algorithm in Assembly Language Video 1

    Lecture 5: Bresenhams Algorithm in Assembly Language Video 2

    Chapter 17: Goodbye

    Lecture 1: Next Course

    Chapter 18: Bonus Section

    Lecture 1: Bonus Lecture

    Instructors

  • Design a CPU 2  No.2
    Ross McGowan
    Applied Mathematics and Computer Science Educator
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